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Innovative modeling supports Co-Design of the Power Supply Chain, part 2: new software tools ease problems associated with power delivery design in large computer systems

Printed Circuit Design & Manufacture, August, 2008 by David Quint, Charles Keen

AC impedance is a very useful metric from the PDS perspective. It is generally obtained by placing a current source or array of current sources at the die interface in the package and then measuring the AC voltage magnitude as the frequency of the sources is swept across a large range. Dividing the voltage by the current gives an equivalent impedance, Z(f). This impedance will typically display one or more resonances, caused by the inductances and bypass capacitances in the system. During current transients, this can cause ringing of the supply voltage, and the possibility of exceeding the low or high limits of voltage specifications. Recently, a lot of attention has been focused on reduction of this resonance behavior, including usage of dissipative bypass capacitors and multiple sizing of capacitors on the package and board. FIGURE 5 illustrates such a resonance in an early version of a package design. The Z(f) plot reveals the resonance at a number of locations within the package, which has bypass capacitors mounted at 20 locations surrounding the die. FIGURE 6 shows the same package, except the arrangement of several different capacitances serves to break up the resonance and reduce its peak impact.

Despite the usefulness of the Z(f) plot, it leaves many questions unanswered. In Figure 6, the resonance peak is reduced five times, but the magnitude of the impedance in other frequency regions increased. Depending on the spectrum of the current draw by the die, this could be a worse situation than before. Even if we can obtain a frequency plot of the total voltage response produced by the die, there may be variations across the face of the IC. The AC response of the PDS provides very valuable information, but more is needed. We must have a transient simulation, and we may need information on the voltage drop at critical locations across the die.

Transient Step Current

This technique is a favorite of power system designers everywhere. It basically provides information that is equivalent or at least similar to the AC analysis. The Fourier transform of the step response could be used to create the frequency sweep and vice versa. The step response can be applied more directly to the power draw behavior of a real IC or a system of packaged ICs and can be more meaningful to engineers that deal with transient simulations on a daily basis. It is also easier to specify as a performance metric of a given part. For example, FIGURE 7 shows the response of the package model to a step in total current (80% to 100% in 3 nS for one of the power domains. The data show the initial DC voltage before the step, followed by a steep drop immediately after the step; then a ringing at two different frequencies and an exponential damping characteristic.

[FIGURE 5 OMITTED]

[FIGURE 6 OMITTED]

Ringing frequencies can be estimated from the plot by measuring periods